http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114256408-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f7cbf6a1a55b84ca15e7f7de42102989 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_35c057a2d73ae88b28d28f9bb2a08715 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-161 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N50-01 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N50-10 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L43-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L43-12 |
| filingDate | 2020-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c060f3a1bf1e2937434222fb8f4face4 |
| publicationDate | 2022-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-114256408-A |
| titleOfInvention | Semiconductor structure and method of forming the same |
| abstract | A semiconductor structure and a method of forming the same, the forming method comprising: providing a substrate including a storage region for forming a magnetic random access memory; forming a first dielectric layer on the substrate and penetrating the first dielectric layer of the storage region Bottom plugs; interconnect bumps are formed on the top surface of the bottom plugs; in the storage area, a bottom electrode layer is formed on the first dielectric layer, and the bottom electrode layer also extends to cover the various surfaces of the interconnect bumps; in the storage area , forming a magnetic tunnel junction stack structure on the bottom electrode layer on the side of the interconnect bump, and a top electrode layer on top of the magnetic tunnel junction stack structure; forming a second dielectric covering the bottom electrode layer and the top electrode layer layer; a top plug is formed in the second dielectric layer above the top electrode layer to electrically connect the top electrode layer. In the present invention, the contact area between the bottom electrode layer and the interconnect bump is larger, thereby reducing the contact resistance between the bottom electrode layer and the bottom plug, thereby improving the performance of the magnetic random access memory. |
| priorityDate | 2020-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 33.