http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113764401-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0b3ed209707008460eb418d12dff55ce |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66386 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0615 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-747 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0262 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7432 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0684 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-747 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-74 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-332 |
| filingDate | 2020-06-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b78ea8a6195e2f816d33c024bc7890a2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e25bec3b46ace78281543fccafe9970b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_27fb2402e0f4f62365f2ec29b1538f9e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e225c7dcb9cdf8757876bf194caa99b3 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6cff1dedb4ef80701a97add43137bb63 |
| publicationDate | 2021-12-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-113764401-A |
| titleOfInvention | Asymmetric grid bidirectional silicon controlled rectifier electrostatic protection device and manufacturing method thereof |
| abstract | The invention discloses an asymmetric grid bidirectional controllable silicon electrostatic protection device and a manufacturing method thereof, wherein the device comprises a P-type substrate; an N-type buried layer is arranged in the P-type substrate; the second N-type deep well is provided with a first N-well, and the third N-type deep well is provided with a second N-well; the first N well and the second N type deep well are not equal in width, and the second N well and the third N type deep well are not equal in width; the first P trap is provided with a first P + injection; the second P trap is provided with a second P + injection, a first N + injection and a first grid; the third P trap is provided with a second grid, a third P + injection and a second N + injection; a fourth gate and a fourth P + injection are arranged on the fourth P well; the first grid electrode is arranged on the right side of the second P well, the second grid electrode and the third grid electrode are respectively arranged on the left side and the right side of the third P well, and the fourth grid electrode is arranged on the left side of the fourth P well; six electrodes in the first P well, the second P well and the fourth P well are connected together to serve as a cathode of the device, and four electrodes in the third P well are connected together to serve as an anode of the device. |
| priorityDate | 2020-06-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 188.