| abstract |
The semiconductor device of the present invention includes an active region including a channel region and source/drain regions adjacent to the channel region, a vertical stack of a plurality of channel features, a gate structure, a bottom dielectric structure, a source/drain structure, and a germanium layer. A vertical stack of a plurality of channel members is located on the channel region. A gate structure is located around and over the vertical stack of channel members. The bottom dielectric structure is located on the source/drain region. The source/drain structure is located on the bottom dielectric structure. The germanium layer is located between the bottom dielectric structure and the source/drain region. |