| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ba08257e440b7610a48f587add409946 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7827
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-053
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-34
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-482
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-488 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2021-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5a17beb131a4bb3f45c8411ce5f7fc03
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_127d4fd3bf212363b9a8eb9e493b5ca8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_68171166dc5a229688935646d58286f8 |
| publicationDate |
2021-11-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-113629054-A |
| titleOfInvention |
U-shaped transistor array and method of forming the same, semiconductor device and method of forming the same |
| abstract |
Embodiments of the present application provide a U-shaped transistor array and a method for forming the same, a semiconductor device and a method for forming the same, wherein the U-shaped transistor array includes a plurality of U-shaped transistors arranged along a first direction and a second direction respectively; A U-shaped transistor includes: a channel region; a source electrode located at a first end of the channel region; a drain electrode located at a second end of the channel region, wherein the first end and the second end are respectively the channel region at the first end Two opposite ends in three directions; the first end and the second end have different sizes in the first direction; the source electrode, the channel region and the drain electrode form a U-shaped structure; the gate electrode, the channel region is located at the gate electrode The gate oxide layer is located between the channel region and the gate electrode; the plane formed by the first direction and the second direction is perpendicular to the third direction; the third direction is the thickness direction of the wafer forming the channel region . |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114220765-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I802207-B |
| priorityDate |
2021-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |