http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113325292-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e0eec63ebec71857cc99e9d98c68ca96 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2607 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2601 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 |
| filingDate | 2021-07-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_35e7c522e1cd6648f1954b4979f30e31 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4e5c728a05b7f47eea5324e3db9ce9a3 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_668f9ad45f7b5497cec8fb69f9372d0a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fcdbe9442b15c4c7de294b4a54f5c093 |
| publicationDate | 2021-08-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-113325292-A |
| titleOfInvention | Power semiconductor device gate oxide performance parameter measurement circuit and measurement method |
| abstract | Power semiconductor device gate oxygen performance parameter measurement circuit and measurement method, including relay module, signal control terminal, three-axis in-line BNC socket, coaxial in-line BNC socket, insulating socket, BIAS terminal, PCB board; the relay module includes A plurality of relays, a plurality of the controllers are used for connecting with the gate, the drain and the source of the power semiconductor device; the signal control terminal is used for receiving the signal for controlling the on-off of the relay in the relay module; the insulating socket is used for The power semiconductor device under test is fixed; the BIAS terminal includes the BIAS+ terminal and the BIAS‑ terminal, which are used for applying bias voltage; the PCB board realizes the electrical signal connection between the above components. The invention can intuitively analyze the gate structure parameter changes in the process of device degradation, further analyze the factors affecting the gate reliability, and provide important theoretical guidance for the gate use and structure design of the device. |
| priorityDate | 2021-07-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 20.