http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113267714-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-06722 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-07314 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-06755 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2612 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R1-073 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R1-067 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 |
| filingDate | 2021-04-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2022-05-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2022-05-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-113267714-B |
| titleOfInvention | Multi-pin array type pseudo MOS structure measuring probe |
| abstract | The invention belongs to the technical field of testing, and particularly relates to a multi-pin array type pseudo MOS structure measuring probe. The measuring probe is formed by uniformly arranging a plurality of peripheral probes in an annular manner around a central probe, wherein the central probe is connected with a lead wire to conduct as a source electrode (or a drain electrode), the peripheral probes are connected in a short circuit manner to jointly connect a lead wire to conduct as a drain electrode (or a source electrode), and the distance between the central probe and the peripheral probes is the same and is 0.2-5 mm; the number of peripheral probes is flexibly set according to the test requirement. The measuring probe provided by the invention can effectively shield the intrinsic leakage point in the measuring process, and the shielding effect is enhanced along with the increase of the number of the peripheral multiple pins. The measuring probe can be widely applied to measurement and characterization of structures such as silicon on insulating layer (SOI), germanium on insulating layer (GeOI), polysilicon on oxide layer and the like. |
| priorityDate | 2021-04-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 19.