http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113078098-A

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filingDate 2020-01-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a80b1b806c31341ad36e635cdfbf4e77
publicationDate 2021-07-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-113078098-A
titleOfInvention Semiconductor structure and manufacturing method thereof
abstract The invention provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate having first and second regions. The semiconductor structure also includes an epitaxial layer over the substrate, a first element and a second element respectively located on the first and second regions of the substrate. The first element comprises a first grid electrode positioned on the epitaxial layer, a first source electrode and a first drain electrode which are respectively positioned at two opposite sides of the first grid electrode, and a dielectric layer is formed on the epitaxial layer and covers the first grid electrode. The second element comprises a second grid electrode positioned on the dielectric layer, and a second source electrode and a second drain electrode which are respectively positioned on two opposite sides of the second grid electrode, wherein the second source electrode is electrically connected with the first drain electrode. The semiconductor structure further comprises an isolation structure arranged on the substrate to isolate the epitaxial layers in the first and second regions from each other. The invention can avoid the noise caused by the parasitic inductance and the parasitic capacitance generated by connecting different elements by the traditional routing.
priorityDate 2020-01-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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