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filingDate 2020-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_74e1c8ded259d48659f3bbf4fe28ce9c
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publicationDate 2021-02-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-112306215-A
titleOfInvention Techniques for managing per-core performance states
abstract This application discloses techniques for managing per-core performance states. The processor includes a plurality of cores and includes power management control logic for (a) determining a preliminary frequency for each of the cores and (b) determining a maximum frequency based on the preliminary frequency. Power management control logic is used to determine the dynamically tuned frequency based on the maximum frequency and the reduction factor. Power management control logic is configured to set the core to a frequency at least equal to the dynamically tuned frequency in response to the selected core's dynamically tuned frequency being greater than the core's preliminary frequency. Power management control logic is configured to set the core to a frequency at least equal to the preliminary frequency in response to the preliminary frequency of the selected core being greater than the dynamically tuned frequency of the core. Other embodiments are described and claimed.
priorityDate 2019-07-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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