http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-112292751-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1ee8c3751d7e78666a0707dd681e768b |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6675 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66765 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78678 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78663 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78672 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
| filingDate | 2018-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ac01a506adf2d888d7522b66d339c31e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_94021f4fd4dc417bbdff54b11a5d7466 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f6cefcea10fe360498e67cebad1d5c51 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7961e246ac0d0e22d23c35e715258eea http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_751b46354d650b4cc09bd171ed7254e4 |
| publicationDate | 2021-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-112292751-A |
| titleOfInvention | Thin film transistor and method of manufacturing the same |
| abstract | The thin film transistor includes a gate electrode supported on a substrate, a gate insulating layer covering the gate electrode, and a semiconductor layer disposed on the gate insulating layer and including a polysilicon region p having: a semiconductor layer including a first region Rs, a second region Rd, and a channel region Rc between the first region and the second region; a source electrode s electrically connected to the first region; a drain electrode d electrically connected to the second region, the protective insulating layer being disposed between the semiconductor layer and the source and drain electrodes; an i-type semiconductor layer which is disposed between the protective insulating layer and the channel region so as to be in direct contact with a part of the channel region, and which is composed of an intrinsic semiconductor; and a sidewall disposed on a side surface of the protective insulating layer, wherein the i-type semiconductor layer has a band gap larger than that of the polysilicon region, and the sidewall is in direct contact with the channel region between the i-type semiconductor layer and the first region and between the i-type semiconductor layer and the second region when viewed from a normal direction of the substrate. |
| priorityDate | 2018-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 24.