http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111984925-A

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filingDate 2020-07-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_400b8fef51446f77ca7b5d467c2a88da
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publicationDate 2020-11-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-111984925-A
titleOfInvention Circuit abnormity positioning method based on loop impedance, storage medium and computing equipment
abstract The invention discloses a circuit abnormity positioning method based on loop impedance, a storage medium and a computing device, which are used for collecting current and voltage data of users and distribution transformers in a low-voltage distribution area and screening the data according to set requirements; calculating the distribution probability of loop impedance of all users in the low-voltage transformer area according to the acquired voltage and current data of the distribution transformer and the users of the electric meter; and obtaining a maximum or minimum impedance interval corresponding to the maximum or minimum distribution probability according to the distribution probability of the loop impedance of all users in the transformer area, and positioning the line with abnormal transformer area state. And continuously tracking and calculating loop impedance of all users in the transformer area, refining and judging the specific position of the abnormal circuit parameter of the transformer area according to the subordination relation among the outgoing line, the subordination branch and the meter box of the users, and assisting to guide the operation and the inspection of the transformer area.
priorityDate 2020-07-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 24.