| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B63-30 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-011
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-066
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-231
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-821
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-828
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-826
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-841
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-8828
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-8613 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L45-00 |
| filingDate |
2019-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a64782c1c664eecd491b1515a361abc2
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3ae9a32b29ad672ae823bc87f7c45e96
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b8350e01cb1d11ca28c9f42669330cd4 |
| publicationDate |
2020-11-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-111952447-A |
| titleOfInvention |
phase change memory device |
| abstract |
The phase change memory device includes a bottom electrode, a bottom memory layer, a top memory layer, and a top electrode. The bottom memory layer is over the bottom electrode. The bottom memory layer has a first height and includes a tapered portion and a neck. The tapered portion has a second height. The ratio of the second height to the first height is in the range of about 0.2 to about 0.5. The neck is located between the tapered portion and the bottom electrode. The top memory layer is above the bottom memory layer. The tapered portion of the bottom memory layer tapers in a direction from the top memory layer towards the neck. The top electrode is over the top memory layer. |
| priorityDate |
2019-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |