| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7838
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1083
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66477 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2020-04-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_543d1538a8ce3bf1ed24b0d187bc27b1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7fc209e576d9117a4479e7b576cc9ca7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_06e359ce7ccd72a9fb19b322f2ba39d9
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fa35986b39a8f0aaa6ce5934ec68891d |
| publicationDate |
2020-10-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-111834226-A |
| titleOfInvention |
Semiconductor device and method for manufacturing the same |
| abstract |
A semiconductor device including a FET, comprising: an isolation insulating layer disposed in the trench of the substrate; a gate dielectric layer disposed over the channel region of the substrate; a gate electrode disposed over the gate dielectric layer; a source and a drain disposed adjacent to the channel region; and an embedded insulating layer disposed under the source, the drain, and the gate electrode, and both ends of the embedded insulating layer are connected to the isolation insulating layer. Embodiments of the present invention also relate to methods of manufacturing semiconductor devices. |
| priorityDate |
2019-04-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |