http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111799165-B
Outgoing Links
Predicate | Object |
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classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28008 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-30 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11568 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11521 |
filingDate | 2020-09-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2020-12-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2020-12-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-111799165-B |
titleOfInvention | A kind of preparation method of semiconductor structure |
abstract | The invention discloses a preparation method of a semiconductor structure, which at least comprises the following steps: providing a substrate; forming a gate oxide layer on the substrate; forming a first polysilicon layer on the gate oxide layer; forming a dielectric layer on the surface of the first polysilicon layer and on the gate oxide layer, the dielectric layer forming a gate structure on the sidewall of the first polysilicon layer; forming a second polysilicon layer on the dielectric layer; perform a first etching, the first etching removes part of the second polysilicon layer, and uses the dielectric layer as a stop layer; perform a second etching , the second etching removes the dielectric layer on the first surface of the first polysilicon layer. The present invention can improve the performance stability of the semiconductor device. |
priorityDate | 2020-09-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 24.