http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111769096-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5223 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76801 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5227 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate | 2020-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2023-01-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2023-01-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-111769096-B |
| titleOfInvention | A general substrate based on three-dimensional capacitive inductance and its preparation method |
| abstract | The invention belongs to the technical field of semiconductor packaging, and specifically relates to a three-dimensional capacitive inductance-based general substrate and a preparation method thereof. The universal substrate of the present invention has three-dimensional capacitance and inductance integrated in the through-silicon via, and the value of the three-dimensional capacitance and inductance can be adjusted. Since the electrodes of the capacitance and inductance are prepared separately, the capacitance and inductance on the substrate can be connected in series or in parallel by wire bonding or rewiring to obtain different inductance and capacitance layouts. The universal substrate with passive components provided by the present invention does not need to separately design the substrate and passive components when each system is integrated. In addition, this kind of substrate effectively increases the value of capacitance and inductance in the integrated system. At the same time, it can integrate the capacitance and inductance near the chip in three-dimensional integration, and can also improve the functional density of TSV in three-dimensional integration and improve the utilization rate of silicon in system integration. . Compared with discrete capacitors and inductors on other organic PCB boards, the integration level is greatly improved. |
| priorityDate | 2020-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 25.