http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111665995-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b6b16422602e3ef74609359047b3a3f2 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0416 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-1315 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0446 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-123 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-32 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F3-044 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F3-041 |
| filingDate | 2020-06-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b3881915b7ead2267f0c0180b9412563 |
| publicationDate | 2020-09-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-111665995-A |
| titleOfInvention | Self-capacitive touch substrate and display device |
| abstract | The invention discloses a self-capacitance touch substrate, comprising: a display area, a peripheral area, a plurality of self-capacitance touch electrodes disposed in the display area, and a plurality of touch electrode leads connected to the self-capacitance touch Control electrodes; wherein each of the self-capacitance touch electrodes is respectively connected to one of the touch electrode leads, a plurality of the self-capacitance touch electrodes are distributed in a matrix of rows and columns, and a plurality of the self-capacitance touch electrodes The capacitive touch electrodes are arranged in groups; the self-capacitive touch substrate further includes a thin film transistor switch circuit and a peripheral lead of the self-capacitive touch electrodes arranged in the peripheral region; a plurality of the self-capacitive touch electrodes The control electrodes are connected to the thin film transistor switch circuit in a grouped manner; wherein the thin film transistor switch circuit is a multi-level thin film transistor switch circuit. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022241788-A1 |
| priorityDate | 2020-06-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.