http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111627491-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6f9e420e6264c6137e87f3ade110b213 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-56 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-56 |
| filingDate | 2020-06-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_171b13396f6c5e4c0bf0c2d338fb80bd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_caa8283b1690f44929da471b794d9ca7 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3f9093a5d5b5278fe9232863c74f7a03 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c62885ba2428fdf76d6f3465a36be240 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_366ea8eef95881f5020bd11971893d11 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_df54aae24d2ee04b930d72672327e4be http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4c348bf492c13fffd63e261395e526d6 |
| publicationDate | 2020-09-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-111627491-A |
| titleOfInvention | Flash memory testing module based on USB3.0 and testing method thereof |
| abstract | The invention discloses a Flash memory testing module based on USB3.0 and a testing method thereof. The Flash memory test module based on the USB3.0 comprises: the system comprises an FPGA minimum system used for connecting a Flash memory to be tested to test and an upper computer in communication connection with the FPGA minimum system through a USB3.0 interface module, wherein the USB3.0 interface module is used for realizing instruction and data transmission between the FPGA minimum system and the upper computer. The test module provided by the invention can realize Flash memory erasing, reading and writing operations under the control of the FPGA, the operation result is processed by the FPGA and then transmitted to an upper computer for display through a USB3.0, and a user can control the test of the memory through the upper computer and the like. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113409873-A |
| priorityDate | 2020-06-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 27.