http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111276402-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ca46be4e68fa1f5a8b2ef4ab654c490a |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-44 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-47 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66969 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41733 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41758 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-401 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-34 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-44 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-47 |
| filingDate | 2020-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9b9e3ce6a4df2d7edd587db1d80d45b6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_571c1df51bb6c589091ef098b7da6c27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_25782c8714324843f90503ff693d868c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_56a71306a58395dde4e827db6a253a76 |
| publicationDate | 2020-06-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-111276402-A |
| titleOfInvention | A metal oxide/graphene heterojunction transistor and preparation method thereof |
| abstract | The invention provides a method for preparing a metal oxide/graphene heterojunction transistor, which belongs to the technical field of semiconductor devices. Including preparing a metal oxide layer on a substrate; preparing thin-layer graphene by chemical vapor deposition; transferring two equal-sized thin-layer graphene onto different areas on the surface of the metal oxide layer; A gate insulating layer is deposited on the graphene and on the channel formed between two thin layers of graphene on the surface of the metal oxide layer, and finally a gate electrode layer is prepared on the surface of the gate insulating layer, that is, a metal oxide/graphene heterojunction is obtained. transistor. The invention also provides a metal oxide/graphene heterojunction transistor prepared by the preparation method. Through the heterojunction formed between the metal oxide and the graphene, the invention makes the interface between the metal oxide and the thin-layer graphene have a smaller boundary Schottky potential barrier, and effectively improves the transport of carriers at the interface, thereby Improve device performance. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-112563353-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2023159390-A1 |
| priorityDate | 2020-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 50.