| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823475
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2029-7858 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76805
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76895
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4232
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31144
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76879
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-401
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41725
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7684
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76865 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2019-11-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_701816bed27037a30a99ee9bd9416a20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4526195978869b078587b002746f4994
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_51fd586b4e2c7df058fe0fc07c6de169
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_28289288b45d7fdfada2e624f126ae5a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e0015d05abb0ac60cc3d8d838c74b0e6
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_573aeecd7b98dbd4de4ad04458798264
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bc92f76ae717916c7ab22d2e5d0f5bc7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d5f9fec88b04bbc4f55de18f445c6dbe |
| publicationDate |
2020-06-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-111244027-A |
| titleOfInvention |
Semiconductor structure and forming method thereof |
| abstract |
Vertical interconnect structures and methods of forming the same are provided. The vertical interconnect structure may be formed by partially filling the first opening through one or more dielectric layers with a conductive material layer. A second opening is formed in the dielectric layer such that the depth of the first opening after the conductive material layer is partially filled is close to the depth of the second opening. The remaining portions of the first and second openings may then be filled simultaneously. |
| priorityDate |
2018-11-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |