| abstract |
The present application discloses a 3D memory device and a manufacturing method thereof. The 3D memory device includes: a substrate; a gate stack structure located above the substrate, the gate stack structure includes a plurality of gate conductors and a plurality of interlayer insulating layers stacked alternately, and a gate conductor located at the bottom of the gate stack structure a bottom select gate is provided; a plurality of channel pillars respectively penetrate the gate stack structure and are divided into a plurality of groups, each group including a plurality of adjacent channel pillars; and at least one isolation structure, respectively located in the adjacent two groups Between the channel pillars, the bottom select gate is divided into a plurality of bottom sub-gates isolated from each other by at least one isolation structure, wherein each bottom sub-gate is used to control a group of channel pillars adjacent to it, different The bottom sub-gates respectively control different groups of channel pillars. In the 3D memory device, an isolation structure is formed between adjacent two groups of channel pillars, so that each bottom sub-gate can individually control each group of channel pillars. |