| abstract |
Integrated circuit devices including isolation liner layers for different types of finfets and related methods of fabrication are disclosed. An exemplary method includes performing a fin etch process on a substrate to form a plurality of first trenches to define a plurality of first fins in a first region and a plurality of second trenches to define a plurality of second fins in a second region. An oxide liner layer is formed on the first fin in the first region and the second fin in the second region. A nitride liner layer is formed on the oxide liner layer in the first and second regions. After removing the nitride liner layer from the first region, an isolation material is formed on the oxide liner layer and the nitride liner layer to fill the first trench and the second trench. The isolation material, the pad oxide layer, and the pad nitride layer are recessed to form a first isolation structure (isolation material and pad oxide layer) and a second isolation structure (isolation material, pad nitride layer, and pad oxide layer). |