http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110957265-A

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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
filingDate 2018-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2020-04-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-110957265-A
titleOfInvention Semiconductor interconnection structure and preparation method thereof
abstract The invention provides a semiconductor interconnection structure and a preparation method thereof, comprising the following steps: 1) providing a substrate, forming a dielectric layer on the upper surface of the substrate, and forming a contact hole in the dielectric layer; 2) carrying out shape adjustment on the top opening of the contact hole to enable the side wall of the contact hole to comprise a vertical side wall and an inclined side wall; 3) forming a seed layer on the bottom, the vertical side wall, the inclined side wall and the upper surface of the dielectric layer of the contact hole; 4) forming a metal layer on the seed layer in the contact hole in an electroplating manner at least including multi-stage current density increasing; 5) and 4) annealing the structure obtained in the step 4) to enable the metal layer to fill the contact hole in a non-hole filling mode. The invention firstly adjusts the top appearance of the contact hole before filling the metal layer, thereby effectively avoiding the generation of overhang; and annealing treatment is carried out, so that the contact hole can be filled with the metal layer in a hole-free mode, the resistance value of the filled metal layer is reduced, and the reliability of the device is improved.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-112259499-A
priorityDate 2018-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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