| abstract |
An interconnect structure is disclosed. The interconnect structure includes: a first metal interconnect in the bottom dielectric layer; vias through the top dielectric layer, metal plate, intermediate dielectric layer, and etch stop layer; and metal in the vias through the top dielectric layer, the metal The board, interlayer dielectric layer and etch stop layer reach the top surface of the first metal interconnect. The metal plates are coupled to MIM capacitors parallel to the vias. The second metal interconnect is over the metal in the via. |