| abstract |
The present invention proposes a VDMOS with partial heterojunction of silicon carbide/silicon semiconductor material and its manufacturing method. Quality junction, the active area of VDMOS devices is formed by silicon mature technology. Compared with silicon carbide materials, the interface quality between the thermally grown oxide layer and the silicon surface is higher, so that the mobility of the inversion layer is high, and it will not be in the gate oxide layer. A high electric field is generated to cause burning, and the high critical breakdown electric field of the silicon carbide semiconductor material is used to raise the vertical electric field peak of the device, and the device can bear a higher breakdown voltage, and the thermal conductivity of the silicon carbide semiconductor material is high , which is more conducive to device heat dissipation. |