| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c19a91365ed494d9fe27d24190d4459f |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1608
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41766
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0619 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1608
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42356
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7811
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7828
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-4824
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41725 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
| filingDate |
2019-01-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1acbac183d2f44cde251ebac2f585008
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_75266a0665083a27016287d9bd19781f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c5ef9508c3d012444e9e96aca11958a9 |
| publicationDate |
2019-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-110120392-A |
| titleOfInvention |
Silicon carbide semiconductor device |
| abstract |
The present disclosure provides a silicon carbide semiconductor device that reduces the in-plane distribution of gate resistance of the silicon carbide semiconductor device. The silicon carbide semiconductor device includes an upper gate electrode including a gate pad portion and a gate wiring, and an upper source electrode including first and second source pad portions. The gate wiring includes a gate global wiring portion extending so as to surround the plurality of source pad portions, and a gate connection wiring portion. The upper source electrode includes an outer peripheral source wiring portion extending around the gate global wiring portion, and first and second source connection portions connecting the peripheral source wiring portion and the first and second source pads, respectively. The gate global wiring part includes a first part, a second part and a third part. The first portion is disconnected at the first and second substrate corners, respectively, is located between the first and second substrate corners, and is in contact with the gate connection wiring portion. The second portion is disconnected from the first portion at the corner of the first substrate. The third portion is disconnected from the first portion at the corner of the second substrate. |
| priorityDate |
2018-02-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |