http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110018801-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6c33005681a5b5b090654cc353b7e2e7 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0679 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-061 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-117 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-11 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F3-06 |
| filingDate | 2019-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_77a2ceb22d3dbc7a6c248825737074f2 |
| publicationDate | 2019-07-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-110018801-A |
| titleOfInvention | An all-in-one storage device |
| abstract | The invention discloses an integrated storage device, comprising a substrate, a circuit layer is arranged on the substrate, an insulating layer is arranged on the circuit layer, a main control chip and at least one storage chip are arranged on the insulating layer, and the main control chip is connected with the circuit layer through the circuit layer. The memory chip is electrically connected, one side of the circuit layer has a gold finger for connecting with external equipment, and the insulating layer is provided with a through hole for exposing the pad and the gold finger; the main control chip controls the memory chip according to the input/output signal of the memory chip. The internal gating module selects the output/input path of its corresponding IO port, so that the output/input signal of the main control chip adapts to the input/output signal of the memory chip, that is, the main control chip controls the output and input of its own pins to adaptively store The input and output of the chip are defined, so that a main control chip can be compatible with different types of memory chips using the same PCB wiring, which improves the compatibility of the PCB board, and the wiring method of the circuit layer is simple, which greatly reduces the cost. |
| priorityDate | 2019-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.