http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110010680-B
Outgoing Links
Predicate | Object |
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classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-808 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-2003 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-788 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7787 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0922 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823857 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-861 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66462 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-432 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1066 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8252 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-098 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4232 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7781 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-778 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 |
filingDate | 2018-12-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2022-06-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2022-06-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-110010680-B |
titleOfInvention | Semiconductor device and semiconductor structure |
abstract | The embodiment of the invention provides a semiconductor device and a semiconductor structure, wherein the semiconductor device comprises a substrate, a first III-V group compound layer, a second III-V group compound layer, a source electrode, a drain electrode and a grid electrode stacking structure; a first III-V compound layer disposed on the substrate; a second III-V compound layer disposed on the first III-V compound layer; a source and a drain disposed on opposite lateral boundaries of the second III-V compound layer; the grid stacking structure is arranged on the second III-V group compound layer and comprises a first grid and a second grid, and the first grid is arranged on the second III-V group compound layer; the second grid is arranged on the first grid and electrically insulated from the first grid, and the second grid is electrically coupled to the source. The semiconductor device can reduce the leakage current of the semiconductor device. |
priorityDate | 2017-12-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 53.