| abstract |
The disclosed embodiments are related to the scalar product of the nibble in calculation block operand.In one example, a kind of processor includes decoding circuit, it wants decoded blocks scalar product to instruct, the number of blocks product instruction has the field for being used for operation code, the destination mark symbol for identifying the destination M × N matrix, the first source identifier for identifying the first source matrix of M × K and the second source identifier for identifying the second source matrix of K × N, and each of described matrix all includes double word element；And execution circuit, it will execute instruction decoded with each element (M to the destination matrix identified, N K process) is carried out, will pass through the double word element (M for the first source matrix that will be identified, K each nibble) multiplied by the second source matrix identified double word element (K, N correspondence nibble) this eight products and is allowed to be saturated to generate eight products and be added up with the previous contents of double word element (M, N). |