| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ced06d57158653f544bc3f66134a0c5d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-516
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6684
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B51-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B51-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78391 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-1159
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2018-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_db4cf28005cffbf5b794267bbb1590bd |
| publicationDate |
2019-07-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-109979997-A |
| titleOfInvention |
Semiconductor device and method of manufacturing the same |
| abstract |
Embodiments of the present application relate to semiconductor devices and methods of fabricating the same. In a ferroelectric memory having a ferroelectric film between a gate electrode and a semiconductor substrate, dielectric breakdown of the gate insulating film is prevented and polarization properties of the ferroelectric film are enhanced to improve the performance of the semiconductor device. In a memory cell including a field effect transistor including a control gate electrode formed on a semiconductor substrate, between the control gate electrode and the main surface of the semiconductor substrate, a paraelectric film and a ferroelectric film are sequentially stacked by formed on the main surface of the semiconductor substrate. |
| priorityDate |
2017-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |