http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109904125-B
Outgoing Links
Predicate | Object |
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classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48247 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-181 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73265 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-32245 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-367 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-56 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-29 |
filingDate | 2019-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2021-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2021-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-109904125-B |
titleOfInvention | Preparation method of high-temperature-resistant QFN packaging structure |
abstract | The invention discloses a preparation method of a high-temperature-resistant QFN packaging structure, wherein the QFN packaging structure comprises a radiating pad, a chip and a conductive pad which are positioned in an epoxy insulator, the chip is positioned on the radiating pad, a silver paste layer is arranged between the chip and the radiating pad, a plurality of conductive pads are arranged on the periphery of the radiating pad, and the conductive pads are connected with the chip through a lead, and the preparation method comprises the following steps: s1, uniformly mixing silicon micropowder, a flame retardant and gamma-methacryloxypropyl trimethoxysilane, and carrying out surface treatment; s2, adding epoxy resin, novolac resin, liquid nitrile rubber, diphenylmethane diisocyanate, diethyl pyrocarbonate, dibenzyl phosphate, 5-fluoro-2-methoxyaniline, 2,4, 6-tri (dimethylaminomethyl) phenol and a release agent. The invention has excellent heat resistance on the premise of ensuring good mechanical property, the glass transition temperature reaches 190-230 ℃, and the requirement of high-power high-heating chip packaging can be met. |
priorityDate | 2019-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 40.