http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109665487-B
Outgoing Links
Predicate | Object |
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classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C2203-019 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C2203-0118 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B2207-092 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00269 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-007 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00301 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81B7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81C1-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81B7-02 |
filingDate | 2018-12-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2020-11-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2020-11-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-109665487-B |
titleOfInvention | MEMS device wafer level system packaging method and packaging structure |
abstract | The invention provides a packaging method and a packaging structure of a wafer-level system of an MEMS device. The method comprises the following steps: providing a MEMS chip, and forming a MEMS device and a first sealing ring positioned on the outer side of the MEMS device on the MEMS chip; providing a bearing wafer, and forming a second sealing ring which is vertically corresponding to the first sealing ring on the bearing wafer; and bonding the MEMS chip and the carrier wafer through the first sealing ring and the second sealing ring so as to form a sealed cavity for accommodating the MEMS device between the MEMS chip and the carrier wafer. The method of the invention can not only meet the requirement of air tightness of devices, can achieve high-efficiency communication among all sensing elements, but also can improve the level from single packaged device to single wafer level packaging, has more high preparation efficiency, can prevent physical loss of the devices, can protect the devices from interference of external environment, and is beneficial to the performance and long-term stability of the devices. |
priorityDate | 2018-12-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 21.