http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109390287-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5228 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-564 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-562 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-4853 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823475 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31053 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49811 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0629 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-498 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-48 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-00 |
| filingDate | 2017-08-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2021-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2021-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-109390287-B |
| titleOfInvention | Semiconductor element structure and method of manufacturing the same |
| abstract | The invention discloses a semiconductor element structure and a manufacturing method thereof. The semiconductor element structure includes a semiconductor substrate, a first dielectric layer, a second dielectric layer, a plurality of high-resistance metal segments, a plurality of dummy stack structures, and a metal connection structure. The semiconductor substrate has an active element area and a non-active element area. The first dielectric layer is formed on the semiconductor substrate, and the second dielectric layer is formed on the first dielectric layer. High-resistance metal segments are formed in the second dielectric layer in the non-active device region, and the high-resistance metal segments are separated from each other. The dummy stack structure is formed on the semiconductor substrate and located in the non-active device region, and at least one dummy stack structure passes through the first dielectric layer and the second dielectric layer and is located between two adjacent high-resistance metal segments. The metal connection structure is disposed on the second dielectric layer, and the high-resistance metal segments are electrically connected to each other through the metal connection structure. |
| priorityDate | 2017-08-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.