| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28167
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28238 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823468
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26506
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31155
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26586
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7856
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823821 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate |
2018-06-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_106d1e130b236c3dc0c9be6b9f340a5d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f0bd5391b259b1eaf92250e9b9d7a1db
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a7f72ccc7cddd8fe454f1e6ed8b02432 |
| publicationDate |
2019-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-109216459-A |
| titleOfInvention |
Method for manufacturing a semiconductor device |
| abstract |
A method for fabricating a semiconductor device, the method comprising: forming a fin extending in a first direction on a semiconductor substrate, and forming a sacrificial gate extending in a second direction substantially perpendicular to the first direction over the fin electrode structure. The sacrificial gate electrode structure includes a sacrificial gate dielectric layer and a sacrificial gate electrode layer disposed over the sacrificial gate dielectric layer. Opposing gate sidewall spacers extending along the second direction are formed on opposite sides of the sacrificial gate electrode layer. The sacrificial gate electrode layer is removed to form gate spacers. After removing the gate electrode layer, fluorine is implanted into the gate sidewall spacers by performing a first fluorine implant. The sacrificial gate dielectric is removed and a high-k gate dielectric is formed in the gate spacers. After forming the high-k gate dielectric layer, fluorine is implanted into the gate sidewall spacers and fins by performing a second fluorine implant. |
| priorityDate |
2017-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |