Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a62555ff12316a9a118542896b4c0af7 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-1201 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78678 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78675 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78633 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-127 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1222 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1296 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1229 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-131 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-122 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7866 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 |
filingDate |
2017-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5a492856969af6dea6152eb225151a6e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4f1cca319fc1620c00213ee820d7b81a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5793621fd3aaa2cb8f8cc8ae8dd39833 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fe142e74c00147103cb11686804edfa0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a22ff8c097e88eea2fbf2c1eb35b6573 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8086313b397428074de471e0e03e386b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ab04f6e73919f82b65dda58072c0e989 |
publicationDate |
2019-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
CN-109216373-A |
titleOfInvention |
Array substrate and preparation method thereof |
abstract |
The invention provides an array substrate and a preparation method thereof, belonging to the technical field of array substrates, which can at least partially solve the problem that the active region of the low-temperature polysilicon thin film transistor in the existing array substrate is prone to performance drift due to ultraviolet light irradiation. The array substrate of the present invention includes: a base; a first thin film transistor including a first active region composed of a silicon-based semiconductor; a second thin film transistor including a second active region composed of a metal oxide semiconductor; The second active region is provided with a protective layer in the same layer and with the same material. When the first thin film transistor is turned on, the projection of the conductive portion of the first active region on the substrate does not exceed the projection of the protective layer on the substrate, and the protective layer and the An insulating layer is provided between the first active regions. |
priorityDate |
2017-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |