| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1042
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-221
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2293
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2273
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2257 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-22 |
| filingDate |
2017-03-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_06d5d4cd8045fcaefc6e37ef7059fad6 |
| publicationDate |
2018-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-109074839-A |
| titleOfInvention |
Intra-segment-independent parallel access technique |
| abstract |
A memory device having multiple segments of memory cells, such as ferroelectric memory cells (hybrid RAM HRAM cells), can provide simultaneous access to memory cells within independent segments of the memory device. A first memory unit can be activated, and a second memory unit can be determined to be independent of the first memory unit. If the second memory unit is independent of the first memory unit, the second memory unit may be activated before operations at the first memory unit end. Latching hardware at a memory segment can latch addresses at the memory segment in order to allow a new address to be provided to a different segment to access the second memory unit. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113966534-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113966534-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11114149-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111292786-A |
| priorityDate |
2016-03-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |