http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-108738350-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2617 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R19-0084 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2639 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R15-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2621 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R27-02 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R19-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R27-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 |
| filingDate | 2017-03-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2022-05-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2022-05-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-108738350-B |
| titleOfInvention | High Resolution Power Electronics Measurements |
| abstract | In the described example of a measurement circuit for measuring the drain voltage of the drain terminal (106) of the high voltage transistor (M0) during switching, the measurement circuit includes an attenuator circuit (102) and a differential amplifier (124), which attenuates The attenuator circuit (102) is used to generate the attenuator output signal (VDCLAMP), the attenuator output signal (VDCLAMP) representing the voltage across the high voltage transistor (M0) when the high voltage transistor (M0) is turned on, the differential amplifier (124) uses The amplified sensing voltage signal (VO) is provided according to the attenuator output signal (VDCLAMP). The attenuator circuit (102) includes: a clamp transistor (M1) coupled to a drain terminal (106) of a high voltage transistor (M0) to provide a sense signal (VSENSE) to a first internal node (110); a resistive voltage divider an attenuator circuit (116) for providing an attenuator output signal (VDCLAMP) based on the sense signal (VSENSE); and a first clamp circuit (Z1) for limiting the sense signal voltage when the high voltage transistor (M0) is turned off (VSENSE). |
| priorityDate | 2016-03-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 23.