| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0629
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0617
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B20-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4966
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5256 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-525 |
| filingDate |
2012-11-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_80b328590881313b2e25037cc449158d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1ca9a1b4b06fb5d57877850c199dfdb7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3b233dc42cdef9f6bf2bfecb838b527b |
| publicationDate |
2018-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-108538809-A |
| titleOfInvention |
Integrated circuit with electric fuse and method of forming the same |
| abstract |
A method of forming an integrated circuit with an electrical fuse includes forming at least one transistor over a substrate. Forming at least one transistor includes forming a gate dielectric structure over the substrate. A work function metal layer is formed over the gate dielectric structure. A conductive layer is formed over the work function metal layer. Source/drain (S/D) regions are formed adjacent to each sidewall of the gate dielectric structure. At least one electrical fuse is formed over the substrate. Forming at least one electrical fuse includes forming a first semiconductor layer over the substrate. A first silicide layer is formed on the first semiconductor layer. |
| priorityDate |
2011-11-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |