http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-108074982-B
Outgoing Links
Predicate | Object |
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classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42392 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7827 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823885 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66666 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7843 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-045 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-84 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78642 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1203 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
filingDate | 2017-09-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2021-09-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2021-09-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-108074982-B |
titleOfInvention | Vertical device with enhanced performance and method of forming the same |
abstract | Several enhanced performance vertical devices, such as vertical Field Effect Transistors (FETs) or Complementary Metal Oxide Semiconductor (CMOS) devices incorporating vertical FETs, and methods of forming such devices are disclosed. The strained dielectric layer is laterally adjacent to the gate of the vertical FET, which increases charge carrier mobility in the channel region and improves performance. In a vertical n-type fet (NFET), the strain is compressive to improve electron mobility given the direction of current flow within the vertical NFET; however, in vertical p-type fets (PFETs), the strain is tensile to improve hole mobility given the current direction in vertical PFETs. Optionally, the orientation of the vertical FET relative to the surface plane of the semiconductor wafer on which it is formed is also pre-programmed for optimal charge carrier mobility as a function of the type of FET (i.e., NFET or PFET) and thereby enhance performance. |
priorityDate | 2016-11-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.