http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-108063129-B
Outgoing Links
Predicate | Object |
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classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5384 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0262 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76224 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-538 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 |
filingDate | 2017-12-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2021-01-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2021-01-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-108063129-B |
titleOfInvention | Antistatic adapter plate for system-in-package |
abstract | The invention relates to an antistatic adapter plate for system-in-package, which comprises: a Si substrate (101); a device region (102) which is provided in the Si substrate (101) and includes an SCR tube (1021) and an isolation region (1022), wherein the isolation region (1022) penetrates the Si substrate (101) vertically to isolate the SCR tube (1021) in the Si substrate (101); the TSV region comprises a first TSV region (1031) and a second TSV region (1032), the first TSV region and the second TSV region are arranged on two sides of the device region (102), and filling materials in the TSV region are copper; a first insulating layer (104) provided on the upper surface of the Si substrate (101); a second insulating layer (105) provided on the lower surface of the Si substrate (101); and the interconnection line (106) is arranged in the first insulating layer (104) and is used for connecting the first end face of the TSV region and the SCR tube (1021). According to the invention, the SCR tube is arranged on the silicon through hole adapter plate, so that the problem of weak antistatic capability of the integrated circuit system-in-package is solved, and the antistatic capability of the integrated circuit system-in-package is enhanced. |
priorityDate | 2017-12-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 28.