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filingDate 2016-08-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2022-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2022-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-108028246-B
titleOfInvention Capacitive coupling of integrated circuit die components
abstract The present invention provides capacitive coupling of integrated circuit die features to other conductive regions. Each member to be coupled has a surface that includes at least one conductive area, such as a metal pad or metal plate. An ultra-thin dielectric layer is formed on at least one surface to be coupled. When two members (eg, one member from each die) are permanently contacted together, the ultra-thin dielectric layer is maintained between the two surfaces to form between the conductive regions of each respective member capacitor or capacitive interface between them. The ultra-thin dielectric layer may be composed of multiple layers of various dielectrics, but in one embodiment, the overall thickness is less than about 50 nanometers. The capacitance per unit area of the formed capacitive interface depends on the specific permittivity κ of the dielectric material used in the ultra-thin dielectric layer and the respective thickness of the dielectric material. Electrical and ground connections can be made at the edges of the coupled stack.
priorityDate 2015-09-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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