http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-107481993-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5256 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-525 |
| filingDate | 2016-06-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2019-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2019-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-107481993-B |
| titleOfInvention | The manufacturing method of semiconductor structure |
| abstract | A kind of manufacturing method of semiconductor structure, comprising: the substrate including device area and fuse region is provided；Fin is formed on device area substrate；Isolation structure is formed on the substrate；Form the polysilicon film of covering fin and isolation structure；Etches polycrystalline silicon fiml forms pseudo- grid structure on device area fin, and forms fuse-wires structure on the isolation structure of fuse region；Interlayer dielectric layer is formed on isolation structure between pseudo- grid structure and fuse-wires structure；The forming material protective layer different from pseudo- grid structure on fuse-wires structure；Pseudo- grid structure is removed using protective layer and interlayer dielectric layer as mask.The first forming material at the top of fuse-wires structure of the present invention protective layer different from pseudo- grid structure, is used for when removing pseudo- grid structure, as etch mask to protect fuse-wires structure.Compared to the graph layer for being initially formed covering fuse-wires structure, the scheme of dummy gate structure is then removed using graph layer as exposure mask, the present invention can optimize the electric property of semiconductor devices. |
| priorityDate | 2016-06-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 52.