http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-107369685-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 |
| filingDate | 2016-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2020-02-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2020-02-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-107369685-B |
| titleOfInvention | Semiconductor device, manufacturing method thereof and electronic device |
| abstract | The invention provides a semiconductor device, a manufacturing method thereof and an electronic device, and relates to the technical field of semiconductors. The method comprises the following steps: providing a semiconductor substrate, wherein the semiconductor substrate comprises at least two adjacent PMOS regions, and a groove is formed between the isolation structures in the adjacent PMOS regions; forming a seed crystal layer on the semiconductor substrate at the bottom of the groove; forming a bulk silicon germanium layer on the seed crystal layer; forming a cap germanium-silicon layer on the main germanium-silicon layer, wherein the cap germanium-silicon layer is shaped like a sigma; forming a conformal covering layer on the exposed peripheral surface of each cap germanium-silicon layer, wherein partial covering layers in adjacent PMOS regions are contacted to form an air gap; forming a dielectric layer on the isolation structure and the covering layer; and etching back part of the dielectric layer and part of the covering layer to expose the top surface of the cap germanium-silicon layer. According to the manufacturing method, the RC time delay of the device can be reduced, and bridging between metal silicides formed on the top surface of the embedded germanium-silicon can be avoided. |
| priorityDate | 2016-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 20.