http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-107331773-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_78160fe5924d399deb065f8cbc5ad347 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K10-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K10-80 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L51-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L51-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L51-05 |
filingDate | 2017-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_82eda7e2e63bccd2869efbb94f5c8743 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_076b9db7ab109211ef48a8bbd4d35f7e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ee4744e9508627d59a7312c977ba17da |
publicationDate | 2017-11-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-107331773-A |
titleOfInvention | A degradable protein-based transistor memory and its preparation method |
abstract | The invention discloses a degradable protein-based transistor memory and a preparation method thereof. The protein-based transistor memory comprises: a source, a drain, a semiconductor layer, a charge trapping layer, a dielectric layer, a gate and a protein substrate, wherein A semiconductor layer, a charge trapping layer, a dielectric layer, a gate and a protein substrate are sequentially arranged from top to bottom, the dielectric layer is located on the upper surface of the gate, the charge trap layer is located on the upper surface of the dielectric layer, The semiconductor layer is located on the upper surface of the charge trapping layer, the source and the drain are opposite to and spaced apart from each other on the semiconductor layer and are electrically connected through the semiconductor layer, wherein the source and the drain are The semiconductor layer is a channel region, and the charge trapping layer and gate are spaced apart from the source and drain. The invention solves the problem that the protein-based transistor memory in the prior art cannot be completely degraded, thereby limiting its wide application in the field of biological materials. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110379716-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110379716-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111554469-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111554469-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111724841-A |
priorityDate | 2017-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 68.