http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-107068784-B
Outgoing Links
Predicate | Object |
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classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02E10-547 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-1075 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-028 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-1804 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-028 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-107 |
filingDate | 2017-01-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2019-07-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2019-07-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-107068784-B |
titleOfInvention | A kind of transverse structure germanium/silicon heterogenous avalanche photodetector and preparation method thereof |
abstract | The invention discloses a kind of transverse structure germanium/silicon heterogenous avalanche photodetectors, element manufacturing is on SOI (Silicon-on-Insulator) substrate, with double mesa structures, comprising: substrate, buried layer silica, silicon mesa area, silica space area, silicon contact zone, electrode and epitaxial germanium layer.Buried layer silica is formed on silicon substrate, silicon mesa area is formed on buried layer silica, silica space area is formed on the buried layer silica of silicon mesa area two sides, silicon contact zone is formed on the buried layer silica on the outside of silica space area, epitaxial germanium layer is formed in silicon mesa area, electrode and silicon contact zone Ohmic contact.Two electrode fabrications are on silicon layer, and germanium light absorbing layer is on silicon layer, and the bias being applied on two electrodes makes light absorbing layer and forms the different field distribution of intensity in silicon layer, and light absorption is realized in germanium and avalanche multiplication process is realized in a layer of silicon. |
priorityDate | 2017-01-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.