http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-107039242-B
Outgoing Links
Predicate | Object |
---|---|
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y40-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02603 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B82Y40-00 |
filingDate | 2017-03-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2019-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2019-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-107039242-B |
titleOfInvention | Core-shell heterostructure germanium-silicon nanowire and controllable preparation method and application thereof |
abstract | The invention discloses a core-shell heterostructure germanium-silicon nanowire and a controllable preparation method and application thereof, wherein the position and the size of the nanowire are defined by high-precision electron beam lithography and dry etching, so that the problem of random nucleation growth in the traditional growth method is avoided; the invention introduces a method for reducing the silicon nanowire by using high-temperature silicon oxide, and further reduces the transverse size of the germanium-silicon nanowire; by adjusting the deposition rate ratio of germanium to silicon, the germanium component can be adjusted randomly within the range of 0-100%, and the faster the deposition rate of silicon is, the lower the germanium component is; conversely, the higher the germanium composition; the controllable preparation method of the core-shell heterostructure germanium-silicon nanowire provided by the invention has the advantages of good controllability, simple process steps, high repeatability and the like, and has good application prospects in the directions of nanowire junction-free transistor devices, silicon-based light emitting devices, single-electron device devices and the like in the field of semiconductor manufacturing. |
priorityDate | 2017-03-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 28.