| abstract |
In said examples of techniques for integrating power field effect transistors (FETs), pre-drivers, controllers, and/or resistors into a common multi-chip package for implementing a multiphase bridge circuit, the techniques may provide A multi-chip package (62) of at least two high-side (HS) FETs (80) and at least two low-side (LS) FETs (82, 84, 86), and the at least two HS FETs or the at least LS FETs are placed on a common die (80). Placing at least two FETs on a common die can reduce the number of dies and the number of thermal pads (i.e., die pads) required to implement a set of power FETs, thereby reducing the parts count and/or the multiphase bridge circuit Or allow a more compact, higher current density multi-phase bridge circuit to be obtained without significantly increasing the thermal power dissipation of said circuit. |