http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-106981520-B
Outgoing Links
Predicate | Object |
---|---|
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66969 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2029-42388 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42384 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66492 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78675 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26513 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4908 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78627 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66757 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28158 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
filingDate | 2017-04-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2020-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2020-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-106981520-B |
titleOfInvention | Thin film transistor and preparation method thereof, array substrate and display device |
abstract | A thin film transistor and a preparation method thereof, an array substrate and a display device. The thin film transistor comprises: a base substrate, a gate electrode and a gate insulating layer arranged on the base substrate; an active layer, the gate insulating layer being arranged between the active layer and the gate electrode; The active layer includes a channel region and a doped region disposed on at least one side of the channel region; wherein, the gate insulating layer is provided with a raised portion, and the raised portion is located between the doped region and the gate between the electrodes. The raised portion can increase the distance between the doped region in the active layer and the gate electrode, reduce the parasitic capacitance caused by the overlapping of the doped region and the gate electrode, and can improve the electrical performance of the thin film transistor. |
priorityDate | 2017-04-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 36.