| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26586 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1095
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1083
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26586
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1045
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66712
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41766
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0623
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0626
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-781
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66492
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4175
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-402
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-407 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-265
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 |
| filingDate |
2015-08-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2020-02-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2020-02-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-106663610-B |
| titleOfInvention |
Transistor structure with improved unclamped inductive switching immunity |
| abstract |
A laterally diffused metal oxide semiconductor (LDMOS) transistor structure with improved unclamped inductive switching immunity. The LDMOS includes a substrate of a first conductivity type and an adjacent epitaxial layer. The gate structure is over the epitaxial layer. Drain and source regions, both of the second conductivity type, are located within the epitaxial layer. A channel is formed between the source and drain regions and disposed below the gate structure. A bulk structure of the first conductivity type is formed at least partially below the gate structure and extends laterally below the source region, wherein the epitaxial layer is less doped than the bulk structure. A conductive trench-like feedthrough element passes through the epitaxial layer and contacts the substrate and the source region. The LDMOS includes a trench region of a first conductivity type formed under a source region and laterally adjacent to and in contact with the body structure and the trench feed-through element. |
| priorityDate |
2014-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |