http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-106241726-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C2201-01 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N39-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14692 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B2207-09 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B2203-0127 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C2203-01 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-0032 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00261 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00301 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-007 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81C3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81C1-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81B7-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81B3-00 |
| filingDate | 2015-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2018-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2018-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-106241726-B |
| titleOfInvention | MEMS packaging technology |
| abstract | In some embodiments, the present invention provides MEMS packages. The MEMS package includes a MEMS IC including a MEMS substrate, a dielectric layer disposed over the MEMS substrate, and a piezoelectric layer disposed over the dielectric layer. The dielectric layer includes a flexible membrane made of a dielectric material, and the piezoelectric layer includes a piezoelectric opening over the flexible membrane. A CMOS IC includes a CMOS substrate and electrical interconnection structures. The CMOS IC is bonded to the MEMS IC so the electrical interconnection is close to the piezoelectric layer and thus the CMOS IC surrounds the back cavity above the flexible diaphragm. A support layer is disposed between the electrical interconnect structure and the piezoelectric layer. The support layer has a support layer opening disposed in vertical alignment with the flexible membrane and is part of the rear cavity. Embodiments of the invention also relate to MEMS packaging technology. |
| priorityDate | 2015-06-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559541 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID5461123 |
Total number of triples: 29.