http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105097649-B

Outgoing Links

Predicate Object
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
filingDate 2014-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2017-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2017-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-105097649-B
titleOfInvention The forming method of semiconductor structure
abstract A kind of forming method of semiconductor structure, including:There is provided to be formed with Semiconductor substrate, Semiconductor substrate between some grid structures, neighboring gate structures and there is the first opening, grid structure both sides, which are formed with source/drain region, the surface of grid structure, has etching stop layer;First medium layer is formed in the first opening, the surface of first medium layer is less than the top surface of grid structure;Form the size regulation material layer on covering first medium layer and grid structure surface;Material layer is adjusted without mask etching technique etching size, size regulation side wall is formed on the surface of etching stop layer side wall;Form the second dielectric layer that covering grid structure and size adjust side wall;Second dielectric layer is etched, second is formed in second dielectric layer and is open, the second opening exposes size regulation side wall;First medium layer and etching stop layer in the opening of etching first, form the 3rd and are open.Side wall is adjusted by forming size, the process window of photoetching is increased, prevents from bridging the generation of phenomenon.
priorityDate 2014-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 28.