http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-104934424-A

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filingDate 2015-03-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2b0369f4a20f033f932d87134c5753dc
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publicationDate 2015-09-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-104934424-A
titleOfInvention Integrated structures including adjacent transistors
abstract An integrated structure includes a first MOS transistor having a first controllable gate region overlying a first gate dielectric and a second controllable gate region adjacent to the first MOS transistor and having a first controllable gate region overlying the first gate dielectric. gate area of the second MOS transistor. A common conductive region overlies the first and second gate regions and is separated therefrom by a second gate dielectric. The common conductive region includes a continuous element positioned over portions of the first and second gate regions and a branch extending from the continuous element down towards the substrate as far as the first gate dielectric. The branch is positioned between the first gate region and the second gate region.
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priorityDate 2014-03-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 39.